In a semiconductor device operated as a DC/DC converter, in which two semiconductor chips and a passive component such as a capacitor are mounted on a multi-layered wiring substrate, in taking consideration of reducing a mounting area, the semiconductor chips are mounted on a main surface of the multi-layered wiring substrate, and the capacitor is mounted between a power-supply pattern and a ground pattern on a rear surface, thereof in many cases (see, for example, Japanese Patent Application Laid-Open Publication No. 2003-297963 (Patent Document 1)).
For example, this conventional mounting method is as illustrated in FIG. 5. FIG. 5 is a cross-sectional view illustrating a cross-sectional surface of a conventional semiconductor device.
In this case, as illustrated in FIG. 5, via conductors 115, 125, and 135 for connecting a main surface of a multi-layered wiring substrate 100 and a rear surface thereof are used for heat release of a semiconductor chip (for example, power MOSFET packages 10 and 20) on the main surface, and therefore, the via conductors are arranged at positions away from a capacitor 40, such as a position below the semiconductor chip and a position outside the semiconductor chip.